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AuthorCHES 2003 (2003 : Cologne, Germany)
TitleCryptographic hardware and embedded systems-CHES 2003 : 5th International Workshop, Cologne, Germany, September 8-10, 2003 : proceedings / Colin D. Walter, Cetin K. Koc, Christof Paar (eds.)
Imprint Berlin : Springer, c2003
Descript xiii, 440 p. : ill. ; 24 cm

CONTENT

Che security challenges of ubiquitous computing -- Multi-channel attacks -- Hidden Markov model cryptoanalysis -- Power-analysis attacks on an FPGA - First experimental results -- Hardware to solve sparse systems of linear equations over GF(2) -- Cryptanalysis of DES implemented on computers with cache -- A differential fault attack technique against SPN structures, with application to the AES and KHAZAD -- A new algorithm for switching from arithmetic to boolean masking -- DeKaRT: a new paradigm for key-dependent reversible circuits -- Parity-based concurrent error detection of substitution-permutation network block ciphers -- Securing encryption algorithms against DPA at the logic level: next generation smart card technology -- Security evaluation of asynchronous circuits -- Design and implementation of a true random number generator based on digital circuit artifacts -- True random number generators secure in a changing environment -- How to predict the output of a hardware random number generator -- On low complexity bit parallel polynomial basis multipliers -- Efficient modular reduction algorithm in IFq[x] and its application to "Left to Right" modular multiplication in IF2[x] -- Faster double-size modular multiplication from euclidean multipliers -- Efficient exponentiation for a class of finite fields GF(2[superscript n]) determined by Gauss periods -- GCD-free algorithms for computing modular inverses -- Attacking unbalanced RSA-CRT using SPA -- The doubling attack - Why upwards is better than downwards -- An analysis of Goubin's refined power analysis attack -- A new type of timing attack: application to GPS -- Unified hardware architecture for 128-Bit block ciphers AES and Camellia -- Very compact FPGA implementation of the AES algorithm -- Efficient implementation of Rijndael encryption in reconfigurable hardware: improvements and design tradeoffs -- Hyperelliptic curve cryptosystems: closing the performance gap to elliptic curves -- Countermeasures against differential power analysis for hyperelliptic curve cryptosystems -- A practical countermeasure against address-bit differential power analysis -- A more flexible countermeasure against side channel attacks using window method -- On the security of PKCS#11 -- Attacking RSA-based sessions in SSL/TLS


Embedded computer systems -- Congresses Cryptography -- Congresses Computer security -- Congresses

LOCATIONCALL#STATUS
Central Library (4th Floor)005.82 C524C 2003CHECK SHELVES

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